The present invention relates to a semiconductor memory device and, more particularly, to a semiconductor memory device with a redundant block containing a spare or redundant memory cell array therein.
According to the trend of high density of semiconductor memory devices, redundancy techniques are employed to substitute defective normal memory cells with defect-free redundant memory cells in order to improve the yield of products. At the same time, high-density semiconductor memory devices require division of memory cells into a plurality of blocks containing predetermined memory cells in order to achieve high-speed operation and low power consumption. Generally, since memory cells in semiconductor memory devices have relatively more defects in columns, the semiconductor memory devices arrange spare or redundant columns in which redundant memory cells are associated with each block and have used a column redundancy scheme which replaces normal column containing a defective normal memory cell or cells with redundant column having defect-free redundant memory cells in the same block.
Such prior art technique has a problem that may not effect column redundancy, where the number of defective normal columns in any one of blocks is more than that of replaceable redundant columns in the same block. Moreover, in semiconductor memory devices having a plurality of blocks, increasing the number of replaceable redundant columns per each block incurs the enlargement of device chip size, thereby decreasing the production yield. During the operation of read or write, semiconductor memory devices are precharging all bit line pairs in the same block. Therefore, as data from or into a memory cell in a redundant column are read out or written, bit line pairs connected with defective normal memory cell, i.e., defective normal column in the same block are precharged, thereby giving the result of power dissipation.